Summary
Overview
Work History
Education
Skills
Publications
Work Preference
Timeline
Generic
Open To Work

Robert Sinn

CAMPBELL,California

Summary

Results-driven engineer with a strong background in semiconductor manufacturing and OPC software, specializing in innovative solutions for advanced technologies. Proficient in supporting and optimizing software for ILT, SMO, recipe management, and analytical tools that enhance operational efficiency. Demonstrated expertise in photomask manufacturing, including mask repair and process development, contributing to high-quality production standards. Committed to leveraging technical skills and industry knowledge to drive continuous improvement and support cutting-edge projects. Experienced with product design, testing, and manufacturing processes. Utilizes advanced engineering techniques to improve product performance and reliability.

Overview

21
21
years of professional experience

Work History

Product Engineer

Synopsys
Sunnyvale, CA
11.2022 - Current
  • Developed product specifications and requirements for semiconductor design tools.
  • Support software for Inverse Lithography (ILT) and Source Mask Optimization (SMO) used in photomask design.
  • Developed and test product features
  • Qualify new features
  • Prepared training materials and manuals
  • Trained and supported customers
  • Develop processes to improve quality and TAT of results

Process Engineer

Intel
Santa Clara, CA
01.2015 - 10.2022
  • Responsible for sustaining the repair/inspection modules of the photomask shop.
  • Manage, train and develop technicians
  • Ensured quality of the product and process
  • Determined repair strategies
  • Monitored tools health, stability and repeatability
  • Assisted in development and qualification of new tools and recipes
  • Run AFM, SEM, and inspection tools
  • Develop software to support manufacturing
  • Analyzed process flows to identify bottlenecks and recommend improvements.
  • Collaborated with cross-functional teams to implement efficient manufacturing solutions.

Senior Applications Engineer

Alphray
Malta, NY
09.2012 - 12.2013
  • Supported and implemented an advanced recipe management system into a semiconductor Fab.
  • Worked in a small group to accurately migrate the entire Fab from the legacy system to a new recipe management system, finishing a month ahead of schedule and less than expected impact to production
  • On-site and on-call support for CamLine recipe management system
  • Managed software updates to meet customer needs and improve the speed/accuracy of the migration
  • Developed, designed and tested new features/updates to the system to improving ease of use and recipe security
  • Created and ran training class for new system
  • Wrote/developed training material and user guides for the new system

Applications Engineer

Luminescent Technologies
Palo Alto, CA
11.2008 - 08.2012
  • Responsible for development/support of OPC lithography and mask/wafer inspection/classification software.
  • Developed product specifications
  • Prototyped product features – ILT, SMO, Physical Resist, Physical Model
  • Validated application before customer releases
  • Developed data analysis tools
  • Prepared training materials and manuals
  • Trained and supported customers

Manufacturing Engineer

Intel
Santa Clara, CA
04.2005 - 11.2008
  • Analyzed manufacturing processes to identify efficiency improvements and reduce waste.
  • Designed and implemented assembly line modifications to enhance productivity and safety.
  • Collaborated with cross-functional teams to develop solutions for production challenges.
  • Conducted failure mode effects analysis (FMEA) to assess risks in manufacturing operations.
  • Responsible for sustaining the repair/inspection modules of the photomask shop.
  • Managed, trained and developed tool technicians
  • Ensured quality of the product and process
  • Determined repair strategies
  • Monitored tools health, stability and repeatability
  • Assisted in development and the qualification of new tools
  • Worked on AFM, FIB, SEM, Laser Etch, and inspection tools
    Projects
  • Developed and implement new process and procedures to help reduce the average throughput time in the repair module by 50%
  • Co-developed new processes to increase capability of new/legacy tools to repair tighter pitched photomasks

Education

Master of Science - Electrical Engineering (Electromagnetic)

University of California Los Angeles
Los Angeles, CA
12-2004

Bachelor of Science - Electrical Engineering

Santa Clara University
Santa Clara, CA
06-2002

Bachelor of Science - Physics

Santa Clara University
Santa Clara, CA
06-2002

Skills

  • Process Development
  • Testing of Applications at all Stages of Development
  • Developing Test Methods
  • Problem Solving
  • Develop BKMs
  • Process development
  • Production planning
  • Process validation
  • Data analysis
  • Customer Assistance and Training

Publications

  • “SMO applied to contact layers at the 32nm node and below with consideration of MEEF and MRC”, Te-Hung Wu, Robert Sinn, Bob Gleason, JongDoo Kim, Jiyoung Hong, Sejin Park, and Sukjoo Lee, Proc. SPIE 8166, 81660W (2011)
  • “Double patterning for 56 nm pitch test designs using inverse lithography”, Thuc Dam, Robert Gleason, Paul Rissman, and Robert Sinn, Proc. SPIE 8166, 81663Q (2011)
  • “Exploring the impact of mask making constraints on double patterning design rules”, Thuc Dam, Robert Sinn, Paul Rissman, and Bob Gleason, Proc. SPIE 8166, 816629 (2011)
  • “Comparison of clear-field and dark-field images with optimized masks”, Robert Sinn, Thuc Dam, and Bob Gleason, Proc. SPIE 7973, 79731V (2011)
  • “Source-mask co-optimization (SMO) using level set methods”, Vikram Tolani, Peter Hu, Danping Peng, Tom Cecil, Robert Sinn, Linyong Pang, and Bob Gleason, Proc. SPIE 7488, 74880Y (2009)

Work Preference

Job Search Status

Open to work

Work Type

Full Time

Location Preference

On-SiteHybridRemote

Salary Range

$135000/yr - $200000/yr

Timeline

Product Engineer

Synopsys
11.2022 - Current

Process Engineer

Intel
01.2015 - 10.2022

Senior Applications Engineer

Alphray
09.2012 - 12.2013

Applications Engineer

Luminescent Technologies
11.2008 - 08.2012

Manufacturing Engineer

Intel
04.2005 - 11.2008

Master of Science - Electrical Engineering (Electromagnetic)

University of California Los Angeles

Bachelor of Science - Electrical Engineering

Santa Clara University

Bachelor of Science - Physics

Santa Clara University