Work History
Education
Skills
Work Availability
Accomplishments
Timeline
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SOURISH SANKAR SINHA

SOURISH SANKAR SINHA

Raleigh,North Carolina

Work History

Applications and Testing Engineer

UnitedSiC
Princeton, NJ
08.2020 - 12.2020
  • DPT testing of new Gen4 FET's, Totem Pole Power Factor Converter Board, Embedded Coding in TI Microcontroller.

Engineer

ABB India Ltd
08.2014 - 09.2017
  • Order handling for medium voltage switchgear, particularly air and gas-insulated switchgear
  • Participating in tenders related to the power sector all over the globe
  • Exports, submission of offers, and evaluation of technical requirements

Traction Motor Factory of Indian Railways
11.2012 - 12.2012
  • Performed testing and maintenance of DC motors, three-phase induction motors, and Arno (Cyclo) Converters

Education

Coursework – Inverter-Based Generation Modeling and Control, Power Electronics, Analog Electronics, Power Electronics design and Optimization, Power Electronics Design and Packaging, Advanced Power Electronics, Power Management Integrated Circuit, Power Semiconductor Devices, Wide Band Gap Semiconductor Power Devices. -

Ph.D - Power Electronics

North Carolina State University

Bachelor of Engineering - Electrical

Savitribai Phule Pune University (formerly University of Pune)

Skills

  • TECHNICAL SKILLS
  • PCB Design Tools:
  • ALTIUM
  • Simulation Software: MATLAB, PLECS, LT SPICE, CADENCE, ANSYS THERMAL/MAXWELL/PEMag, COMSOL
  • Programming Language: C, MATLAB

Work Availability

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Accomplishments

  • Design and Optimization of 500kHz Multi-Output Flyback Converter: A Multi-output flyback converter with an input voltage range of 65-85V, output of 25V,50V, and 150V, and an efficiency of 92% using peak current control was designed. Loss analysis and component selection using the best-optimized Pareto graph were carried out
  • Design of Double-Sided Cooled 1.2kV/36A SiC Phase Leg Power Module: A double-sided cooled phase leg power module was designed using 1.2kV/36A SiC MOSFET. COMSOL Multiphysics was used to determine the junction temperature and ANSYS Q3D to extract parasitic elements present in the module
  • ERCD Power Stage Fusing characterization for MV Solid State Circuit Breaker (SSCB) Applications: To compare new Epoxy Resin Composite Dielectric (ERCD) substrate to standard high-performance DBC substrate applied to a solid-state circuit breaker. Fuse curves were generated for each design for comparison
  • Electric Field, Thermal, and Mechanical stress Optimization of High Voltage and High-Frequency Ultra-Wide Band Gap based Power Module: Investigation of Electric Field morphing has been carried out on 15kV to 24kV multi-layered stacked substrate structures to reduce the electric field intensity at the triple point in a power module which act as the source of partial discharge
  • Double Sided Integrated GaN Power Module with Double Pulse Test (DPT) Verification: Design, fabrication, analysis, and experimental validation of integrated gate driver-based double-sided cooled GaN IPM with a thin substrate for high-frequency applications up to 1MHz were carried out along with optimized thermal verification. The severity of baseplate current due to higher coupling capacitance for thin substrates was addressed
  • PhD Topic: Design of Low Conducted Emissions 3D Stacked Half Bridge Module with Converter applications: I have designed an innovative High-Frequency power module packaging technique for WBG devices. The biggest challenge in this design was the use of thin substrate,120µm, which causes higher coupling capacitance between conductor traces and ‘back-side metal’ leading to higher substrate and Common Mode (CM) currents occurring from high-speed voltage switching.This is unlike traditional DBC and PCB where the substrate is much thicker. Thus, a new capacitance distribution technique was proposed where the capacitances inside the module have been modified in a ratio such that the maximum amount of baseplate current returns back through decoupling capacitors, instead of returning through the isolation barrier of the gate drive to the module. The module was DPT tested for 8ns rise and fall time under 400V DC bus. This novel packaging technique was able to reduce the peak to peak CM current by 7% at a 20% higher switching speed. This means that at the same switching speed the CM current reduction would be even higher (shown in IMAPS 2022 paper). A demonstration of a 500kHz/0.8kW Full Bridge converter with Zero Voltage Switching was also done (shown in APEC 2023 paper)
  • A Capacitive Modeling Technique for Electric-Field Reduction in HV/MV Power Electronics Modules: A capacitive modeling method to effectively reduce the electric field intensity at the Triple point in power modules, which are the point of origin of partial discharge was proposed. Such models for Electric Field profiling are nonexistent, and the primary way in which such issues are dealt with is a direct simulation hence, this model is the first of its kind. Using this model, a peak electric field intensity reduction of 21.8% in a single-layer structure and 13.7% in a four-layer stacked structure was achieved versus a conventional stacked substrate structure. Presented in NCSU, FREEDM Technical webinar: https://www.youtube.com/watch?v=8wUdhbEXBSg. Paper to be submitted to IEEE Transaction
  • Testing of 1200V Gen4 SiC FETs in a Full Bridge Converter with the Highest Industrial Efficiency: During my internship at UnitedSiC (now Qorvo), I did DPT testing of Gen4 devices and helped in the design of the Totem Pole Power Factor Converter board (along with Microcontroller control loop code) where these devices were to be used. An efficiency of 98.5% at 11kW was achieved, which is one of the highest in the market, and published research with SiC devices.

Timeline

Applications and Testing Engineer

UnitedSiC
08.2020 - 12.2020

Engineer

ABB India Ltd
08.2014 - 09.2017

Traction Motor Factory of Indian Railways
11.2012 - 12.2012

Coursework – Inverter-Based Generation Modeling and Control, Power Electronics, Analog Electronics, Power Electronics design and Optimization, Power Electronics Design and Packaging, Advanced Power Electronics, Power Management Integrated Circuit, Power Semiconductor Devices, Wide Band Gap Semiconductor Power Devices. -

Ph.D - Power Electronics

North Carolina State University

Bachelor of Engineering - Electrical

Savitribai Phule Pune University (formerly University of Pune)

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SOURISH SANKAR SINHA