Versha Aamir

Computer Engineering student with a foundation in digital systems, FPGA design, and mathematical analysis. Experienced in VHDL, C/C++, and Python through hands-on hardware projects, with academic experience in Architecture 1040 that strengthened design and communication skills. Brings analytical thinking and structured problem-solving to STEM learning environments.

• Designed a fully hierarchical 8-bit Arithmetic Logic Unit using VHDL structural modeling. 3-level hierarchy (1-bit adder → 8-bit adder → ALU), VHDL testbench with structured test cases, Simulation verification in Vivado.
• Numerical Methods Implementation, Implemented Blackjack project in Python and C, along with Euler Method, Runge-Kutta Method, and differential equation solvers., Algorithmic thinking + cross-language implementation.
• Architecture & Physical Modeling, Designed and built physical house model using SketchUp for 3D modeling and developed form-based design concepts.
• Robotics Club - CAD Design, Learned SolidWorks