Bachelor of Science - Computer Engineering
California State Polytechnic University, Pomona
Pomona, CA05-2025
William Chu
Rancho Cucamonga,CA
Summary
Computer Engineering graduate with strong foundations in FPGA-oriented digital design, RTL development, and embedded systems. Experienced in Verilog/SystemVerilog/VHDL, FSM-based control logic, memory systems, and hardware–software integration. Hands-on project experience with sensor fusion, real-time embedded control, and distributed systems.
Education
Skills
- Verilog, SystemVerilog, VHDL
- RTL design, synchronous logic
- Finite State Machines (FSMs)
- FIFOs & UART
- Clocking, resets, timing concepts
- Pipeline registers
- Control signal generation
HDL & Digital Design
Computer Architecture
- ESP32, PIC18
- Raspberry Pi, Jetson Nano
- Embedded C/C
- Hardware–software integration
- Git / GitHub
- Python
- ROS 2, RViz
Embedded & Systems
Tools & Software
FPGA & Digital Logic Design Projects
- Designed and verified combinational and sequential logic circuits using Verilog
- Implemented FSM-based controllers, counters, and registers
- Built FIFO buffers and memory arrays for controlled data flow
- Developed UART communication modules with timing-accurate state machines
- Created testbenches for functional verification and debugging
Timeline
Bachelor of Science - Computer Engineering
California State Polytechnic University, Pomona