Yung-Chien Wu
PORTLAND,OR
Summary
Accomplished Process Integration Development Engineer with a proven track record at Intel Corporation, enhancing EOL yield through innovative defect metrology and streamlined manufacturing processes. Expert in defect metrology and adept at cross-functional collaboration, significantly accelerated development cycles. Skilled in leveraging JMP/SQL for data-driven decision-making, communication skills to lead cross-functional teams and drive collaboration with precision and efficiency
Overview
9
9
years of professional experience
Work History
Process Integration Development Engineer
Intel Corporation
11.2021 - Current
- Developed inline defect metrology for next gen processes to support product launch, building metrics to hit forward to EOL indicators and accelerate development cycle as well as line monitoring to prevent process excursion
- Streamlined manufacturing processes for integrated defect reduction, achieving EOL yield and performance goals
Process Engineer
Intel Corporation
11.2015 - 11.2021
- Evaluated N+1 technology and equipment upgrades to deliver MTS target and fully characterize the process throughout development cycle
- Coordinated with vendor to optimize process marginality and achieve machine of record for high volume yield
- Established process control systems and sustained the module through volume ramp
Education
Ph.D. - Chemistry
University of Florida,
Gainesville, FL08.2015
Master of Science - Department of Materials Science And Engineering
University of Florida
Gainesville, FL08.2010
Skills
- CDSEM
- Electron-beam scan
- Voltage contrast scan
- Dark/Bright-field optical scan
- Plasma dry etching
- JMP/SQL
- Deposition precursor synthesis/characterization
Timeline
Process Integration Development Engineer
Intel Corporation
11.2021 - Current
Process Engineer
Intel Corporation
11.2015 - 11.2021
Ph.D. - Chemistry
University of Florida,
Master of Science - Department of Materials Science And Engineering
University of Florida
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