Gretchen Crow
Richfield,Minnesota
Summary
Semiconductor failure analysis engineer with strong problem solving skills and expert knowledge of the failure analysis process.
Overview
36
36
years of professional experience
Work History
Failure Analysis Engineer
Acara Solutions for onsemi
08.2022 - Current
- Manage the signature failure analysis program for the onsemi global labs.
- Provide biweekly online technical training in support of the signature analysis program.
- Review reports and provide engineering direction to the global labs.
- Participate in continuous improvement initiatives aimed at reducing cycle time.
Failure Analysis Engineer
onsemi
08.2004 - 03.2022
- Performed electrical characterization and fault localization on a wide variety of products including Power MOSFETs, IGBTs, Electronic Fuses, Digital Logic, EEPROMs and Image Sensors.
- Mentored technicians and engineers in the onsemi global labs.
- Purchased and managed the successful installation of an Electro Optic Terahertz Pulse Reflectometry (EOTPR) tool used to quickly identify package fault locations and reduce time to physical failure analysis.
Failure Analysis Engineer
Microchip Technology
02.2000 - 07.2003
- Performed electrical failure analysis on microcontrollers, serial EEPROMs, and Keeloq encryption devices.
- Conducted physical failure analysis using various techniques including FIB, SEM, EDX, mechanical cross-sectioning and parallel lapping.
Failure Analysis Engineer
Motorola Semiconductor Products Sector
01.1997 - 01.2000
- Performed electrical failure analysis on microcontrollers and digital signal processors.
- Conducted physical failure analysis using various techniques including FIB, SEM, EDS, TEM sample preparation, mechanical cross-sectioning and parallel lapping.
Device Engineer
Motorola Semiconductor Products Sector
01.1995 - 01.1997
- Leader of the MOS2 Failed Bit Map Analysis Team which eliminated three major sources of defects from the wafer processing line and increased yield by 5%.
- Supervised a team of three technicians in the SEM laboratory which supported the wafer fab. The team assisted with process development, yield enhancement and wafer lot disposition.
Physicist
3M
05.1988 - 08.1993
- Conducted process development of high-speed optoelectronic switches in LiNbO3 using techniques common to the semiconductor industry including photolithography, thin film deposition, wet / dry etching and diffusion.
- Imaged samples using a Scanning Electron Microscope (SEM).
Education
B.A., Physics -
St. Olaf College
05.1988
Skills
- Bench Testing
- Microprobing
- PEM, OBIRCH, DALS
- Topside / Backside Decapsulation
- Chemical Delayering
- X-Ray Microscopy
- Liquid Crystal Microscopy
- SEM, FIB, EDS
Technical Papers
Practical Implementation of Soft Defect Localization (SDL) in Mixed Signal and Analog ICs
Eric Barbian; Gretchen Crow; Win Thandar Swe; Mark C. Phillips
Timeline
Failure Analysis Engineer
Acara Solutions for onsemi
08.2022 - Current
Failure Analysis Engineer
onsemi
08.2004 - 03.2022
Failure Analysis Engineer
Microchip Technology
02.2000 - 07.2003
Failure Analysis Engineer
Motorola Semiconductor Products Sector
01.1997 - 01.2000
Device Engineer
Motorola Semiconductor Products Sector
01.1995 - 01.1997
Physicist
3M
05.1988 - 08.1993
B.A., Physics -
St. Olaf College
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