Joshua Ashman
Summary
For the past 24 years, I have been working as an IC Layout Designer. I have extensive experience building and verifying a large variety of mixed signal designs.
I am well-versed in deep sub-micron processes and associated TSMC design rules. I have strong analog layout design skills and I am capable of solving device matching, electro-migration, power distribution, latch-up, ESD and circuit area design restrictions.
I work fast and efficiently on my own, and I also have years of experience working in. and leading, large layout teams across several countries in order to produce high performance chips in several diverse industries.
Overview
24
24
years of professional experience
Work History
Senior Layout Designer
Analog Devices
12.2014 - 11.2023
- Developed new layout design concepts for potential use in future projects.
- Developed and supported workflows and procedures for layout design in Cadence Virtuoso XL.
- Developed innovative designs for variety of chips in Automotive and Infotainment industries.
Custom Analog Designer
Analog Devices
03.2009 - 12.2014
- Reviewed project requirements to plan workflows and evaluate build time and area constraints.
- Assisted in development of new materials for analog design blocks.
- Helped develop new design system to improve efficiency and productivity.
Custom Digital Designer
Analog Devices
06.2001 - 03.2009
- Aligned designs with simulation performance goals.
- Developed creative solutions that improved performance and layout footprint.
- Developed and maintained comprehensive library of standard cell designs for easy access and reuse.
- Reviewed Junior layout designs to identify room for improvement.
Junior Layout Designer
Analog Devices
12.1999 - 06.2001
- Developed Layout skills to work fast and efficient.
- Translate schematics to full custom layout.
- Guaranteed designs adhere to DRC and LVS guidelines.
Education
Associate of Applied Science - Electronics Technology
ITT Technical Institute - Murray
Murray, UT12.1999
Skills
- Expert in High Speed Low Power Analog Layout
- Specialist in Cadence Virtuoso XL Layout
- Knowledgeable in Mentor Calibre LVS/ERC/DRC
- Experienced with Deep Sub Micron Design
- ESD/EM/LUP Conscious Design
- Pad/Pad ring Design
- Chip Level Floorplanning
- Leadership Skills
- Team Collaboration
- Originality and Creativity
- Good communicator
Accomplishments
- 2005 - Hardball Award for contributions to AD981B, one of the top 40 most profitable innovations in company history.
- 2015 - Recognition award for Outstanding Contribution to AD2410 A2B.
- 2017 - Outstanding Contribution Award for "Griffin and GriffinLite" (ADSP-SC5xx and ADSP-215xx)
- 2018 - Outstanding Contribution Award for work on "Tesla" (ADSP-CM41xF)
Timeline
Senior Layout Designer
Analog Devices
12.2014 - 11.2023
Custom Analog Designer
Analog Devices
03.2009 - 12.2014
Custom Digital Designer
Analog Devices
06.2001 - 03.2009
Junior Layout Designer
Analog Devices
12.1999 - 06.2001
Associate of Applied Science - Electronics Technology
ITT Technical Institute - Murray
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