Brian Petty
Houston
Summary
Passionate principal digital hardware design engineer with strong background in FPGA development and design. Successfully implemented multiple high-performance FPGA solutions, enhancing resource utilization, efficiency and functionality in various projects. Demonstrated proficiency in digital circuit design and hardware description languages, consistently delivering reliable results; proven leader and follower.
Overview
19
19
years of professional experience
1
1
Certification
Work History
Senior FPGA Engineer
Quantlab Financial
05.2020 - Current
- Design and verification of low latency RTL modules in SystemVerilog, including but not limited to network protocol parsing engines, ethernet packet inspectors, streaming and memory mapped DMA interfaces, FIFOs, and arbiters.
- Re-architected existing 10GbE TCP module to reduce existing hardware resource utilization; implemented design reduced required resources by eliminating a per session connection manager for a single state based per session memory variable version.
- Implemented UVM verification for10GbE TCP/UDP modules; coded all required verification test bench components including applicable predictor models, sequences and virtual sequences.
- Generation of timing and/or physical constraints for synthesis, implement place and route
- Increased productivity by automating repetitive tasks through scripting languages such as Python or TCL.
- Identification and constraint of multi-cycle and false path signals.
Senior Design Engineer
Magseis Fairfield ASA (now TGS)
01.2013 - 04.2020
- Primary design engineer of ZXPLR control printed circuit board assembly; over10k assemblies produced to date.
- Designs combines high speed data interfaces and FPGA timing solutions from a precision atomic reference.
- Architect and designer of an atomic reference test site which tests over1k UUTs simultaneously. Test board utilizes an Altera (Intel) Cyclone V GT FPGA to implement a GPS PPS tuned ultra-high resolution phase meter.
- Primary design engineer for high resolution pressure transducer for the remote unit sensor package; design incorporates a MSP430 microcontroller, differential amplifier and24-bit ADC for digitization of senor output. PCB is the size of a US nickel and directly mounts to transducer.
- Design of 8-port high speed USB 2.0 hub which serves as the main support equipment communications device to remote units for seismic data download.
Senior Electrical Engineer
SOL Incorporated
02.2011 - 12.2012
- Cradle to grave design and development of commercial digital power electronic products, including microcontroller-based LED drivers, solar charge controllers and infrared serial communication-based control systems.
- Design of commercial standalone solar lighting systems which incorporated photovoltaic power sources, battery energy storage arrays and high efficiency, high brightness LED luminaires.
- Create documentation in support of new product introductions including component level schematics, calculation spreadsheets and circuit simulations, bill of materials, PCB layout guidelines, assembly procedures and test specifications.
- Conduct compliance testing for electrical components and products for the purpose of applicable agency listing and/or rating.
- I.e., UL/TUV listings and certifications, outdoor approval ratings, IP65/67.
Electrical Engineer
Lockheed Martin Corporation
06.2007 - 02.2011
- Design of digital hardware systems for deep water work class remote operated vehicles, which included FPGA/microprocessor-based control systems, digital signal processor based variable frequency motor drives and power distribution systems.
- Designed, verified and demonstrated a fully implemented hardware serial communications multiplexer for an array of BLDC motor controllers.
- Design of firmware and algorithms for FPGA/microcontroller-based electronics in C programming and Verilog hardware language.
- Conducted pre and post design modeling and analysis of electronic systems to ensure system level requirements were met by the design.
Hardware Engineer Intern
Radisys Corporation
05.2006 - 04.2007
- FPGA design and implementation of engineering change orders for various data communication and Ethernet based technologies including10GbE ATCA interface/transmission modules.
- Validation and compliance testing for the purpose of validating communication standards in accordance with PICMG specifications; generated associated documentation for devices under test including procedures, results and reports.
- Participated in multi-discipline engineering teams across global sites for the purpose of team design reviews, project status inquiries and test analysis.
Education
Bachelor of Science - Electrical Engineering
Florida Atlantic University
Boca Raton, FL01.2007
Associate Degree - undefined
St. Petersburg College
St. Petersburg, FL01.2004
Skills
- SystemVerilog/Verilog, VHDL, DPI-C, HLS
- Static timing analysis, timing closure
- Constrained random verification, UVM
- SerDes, PCIe,10GbE, USB, SPI, I2C, UART
- Ethernet/Network Protocols
- C, Python, TCL, Shell, CMake
- Versal, Xilinx US, US, Artix, Zynq
- Intel Cyclone III/V
Affiliations
- National Science Foundation College Scholarship Recipient
- Undergraduate FAU Motorola Research Assistant Selectee
- Florida Atlantic Alumni Association
Accomplishments
National Science Foundation College Scholarship Recipient
Certification
Machine Learning with Python
Timeline
Senior FPGA Engineer
Quantlab Financial
05.2020 - Current
Senior Design Engineer
Magseis Fairfield ASA (now TGS)
01.2013 - 04.2020
Senior Electrical Engineer
SOL Incorporated
02.2011 - 12.2012
Electrical Engineer
Lockheed Martin Corporation
06.2007 - 02.2011
Hardware Engineer Intern
Radisys Corporation
05.2006 - 04.2007
Associate Degree - undefined
St. Petersburg College
Bachelor of Science - Electrical Engineering
Florida Atlantic University
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